$ cat altivec_test.c #include #include #include static sigjmp_buf jmpbuf; static const char *current_test; static int pass = 0, fail = 0; void sigill_handler(int sig) { printf("FAIL: %-30s (illegal instruction)\n", current_test); fail++; siglongjmp(jmpbuf, 1); } #define TEST(name, asm_code) do { \ current_test = name; \ if (sigsetjmp(jmpbuf, 1) == 0) { \ asm_code; \ printf("OK: %-30s\n", name); \ pass++; \ } \ } while(0) int main() { signal(SIGILL, sigill_handler); __vector unsigned char vuc_a, vuc_b, vuc_r; __vector signed char vsc_a, vsc_b, vsc_r; __vector unsigned short vus_a, vus_b, vus_r; __vector signed short vss_a, vss_b, vss_r; __vector unsigned int vui_a, vui_b, vui_r; __vector signed int vsi_a, vsi_b, vsi_r; __vector float vf_a, vf_b, vf_r; /* init */ __asm__ volatile ("vspltisb %0, 2" : "=v"(vuc_a)); __asm__ volatile ("vspltisb %0, 3" : "=v"(vuc_b)); vsc_a = (__vector signed char)vuc_a; vsc_b = (__vector signed char)vuc_b; vus_a = (__vector unsigned short)vuc_a; vus_b = (__vector unsigned short)vuc_b; vss_a = (__vector signed short)vuc_a; vss_b = (__vector signed short)vuc_b; vui_a = (__vector unsigned int)vuc_a; vui_b = (__vector unsigned int)vuc_b; vsi_a = (__vector signed int)vuc_a; vsi_b = (__vector signed int)vuc_b; printf("\nInteger Add/Sub\n"); TEST("vaddubm", __asm__ volatile ("vaddubm %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vadduhm", __asm__ volatile ("vadduhm %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vadduwm", __asm__ volatile ("vadduwm %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vaddubs", __asm__ volatile ("vaddubs %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vadduhs", __asm__ volatile ("vadduhs %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vadduws", __asm__ volatile ("vadduws %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vaddsbs", __asm__ volatile ("vaddsbs %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vaddshs", __asm__ volatile ("vaddshs %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vaddsws", __asm__ volatile ("vaddsws %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vsububm", __asm__ volatile ("vsububm %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsubuhm", __asm__ volatile ("vsubuhm %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vsubuwm", __asm__ volatile ("vsubuwm %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vsububs", __asm__ volatile ("vsububs %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsubuhs", __asm__ volatile ("vsubuhs %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vsubuws", __asm__ volatile ("vsubuws %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vsubsbs", __asm__ volatile ("vsubsbs %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vsubshs", __asm__ volatile ("vsubshs %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vsubsws", __asm__ volatile ("vsubsws %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); printf("\nInteger Multiply\n"); TEST("vmuleub", __asm__ volatile ("vmuleub %0,%1,%2" : "=v"(vus_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmuloub", __asm__ volatile ("vmuloub %0,%1,%2" : "=v"(vus_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmuleuh", __asm__ volatile ("vmuleuh %0,%1,%2" : "=v"(vui_r) : "v"(vus_a), "v"(vus_b))); TEST("vmulouh", __asm__ volatile ("vmulouh %0,%1,%2" : "=v"(vui_r) : "v"(vus_a), "v"(vus_b))); TEST("vmulesb", __asm__ volatile ("vmulesb %0,%1,%2" : "=v"(vss_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vmulosb", __asm__ volatile ("vmulosb %0,%1,%2" : "=v"(vss_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vmulesh", __asm__ volatile ("vmulesh %0,%1,%2" : "=v"(vsi_r) : "v"(vss_a), "v"(vss_b))); TEST("vmulosh", __asm__ volatile ("vmulosh %0,%1,%2" : "=v"(vsi_r) : "v"(vss_a), "v"(vss_b))); printf("\n=== Multiply Sum ===\n"); TEST("vmsumubm", __asm__ volatile ("vmsumubm %0,%1,%2,%0" : "=v"(vui_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmsummbm", __asm__ volatile ("vmsummbm %0,%1,%2,%0" : "=v"(vsi_r) : "v"(vsc_a), "v"(vuc_b))); TEST("vmsumuhm", __asm__ volatile ("vmsumuhm %0,%1,%2,%0" : "=v"(vui_r) : "v"(vus_a), "v"(vus_b))); TEST("vmsumshm", __asm__ volatile ("vmsumshm %0,%1,%2,%0" : "=v"(vsi_r) : "v"(vss_a), "v"(vss_b))); TEST("vmsumuhs", __asm__ volatile ("vmsumuhs %0,%1,%2,%0" : "=v"(vui_r) : "v"(vus_a), "v"(vus_b))); TEST("vmsumshs", __asm__ volatile ("vmsumshs %0,%1,%2,%0" : "=v"(vsi_r) : "v"(vss_a), "v"(vss_b))); printf("\nSum Across\n"); TEST("vsum4ubs", __asm__ volatile ("vsum4ubs %0,%1,%2" : "=v"(vui_r) : "v"(vuc_a), "v"(vui_b))); TEST("vsum4sbs", __asm__ volatile ("vsum4sbs %0,%1,%2" : "=v"(vsi_r) : "v"(vsc_a), "v"(vsi_b))); TEST("vsum4shs", __asm__ volatile ("vsum4shs %0,%1,%2" : "=v"(vsi_r) : "v"(vss_a), "v"(vsi_b))); TEST("vsum2sws", __asm__ volatile ("vsum2sws %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vsumsws", __asm__ volatile ("vsumsws %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); printf("\nMin/Max\n"); TEST("vmaxub", __asm__ volatile ("vmaxub %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmaxuh", __asm__ volatile ("vmaxuh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vmaxuw", __asm__ volatile ("vmaxuw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vmaxsb", __asm__ volatile ("vmaxsb %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vmaxsh", __asm__ volatile ("vmaxsh %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vmaxsw", __asm__ volatile ("vmaxsw %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vminub", __asm__ volatile ("vminub %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vminuh", __asm__ volatile ("vminuh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vminuw", __asm__ volatile ("vminuw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vminsb", __asm__ volatile ("vminsb %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vminsh", __asm__ volatile ("vminsh %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vminsw", __asm__ volatile ("vminsw %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); printf("\nLogical\n"); TEST("vand", __asm__ volatile ("vand %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vandc", __asm__ volatile ("vandc %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vor", __asm__ volatile ("vor %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vnor", __asm__ volatile ("vnor %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vxor", __asm__ volatile ("vxor %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); printf("\nShift/Rotate\n"); TEST("vsl", __asm__ volatile ("vsl %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsr", __asm__ volatile ("vsr %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vslo", __asm__ volatile ("vslo %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsro", __asm__ volatile ("vsro %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vslb", __asm__ volatile ("vslb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsrb", __asm__ volatile ("vsrb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsrab", __asm__ volatile ("vsrab %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vslh", __asm__ volatile ("vslh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vsrh", __asm__ volatile ("vsrh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vsrah", __asm__ volatile ("vsrah %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vslw", __asm__ volatile ("vslw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vsrw", __asm__ volatile ("vsrw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vsraw", __asm__ volatile ("vsraw %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vrlb", __asm__ volatile ("vrlb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vrlh", __asm__ volatile ("vrlh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vrlw", __asm__ volatile ("vrlw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); printf("\nPermute/Select\n"); TEST("vperm", __asm__ volatile ("vperm %0,%1,%2,%1" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsel", __asm__ volatile ("vsel %0,%1,%2,%1" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vsldoi", __asm__ volatile ("vsldoi %0,%1,%2,4" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmrghb", __asm__ volatile ("vmrghb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmrglb", __asm__ volatile ("vmrglb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vmrghh", __asm__ volatile ("vmrghh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vmrglh", __asm__ volatile ("vmrglh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vmrghw", __asm__ volatile ("vmrghw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vmrglw", __asm__ volatile ("vmrglw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); printf("\nCompare\n"); TEST("vcmpequb", __asm__ volatile ("vcmpequb %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vcmpequh", __asm__ volatile ("vcmpequh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vcmpequw", __asm__ volatile ("vcmpequw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vcmpgtub", __asm__ volatile ("vcmpgtub %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vcmpgtuh", __asm__ volatile ("vcmpgtuh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vcmpgtuw", __asm__ volatile ("vcmpgtuw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vcmpgtsb", __asm__ volatile ("vcmpgtsb %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vcmpgtsh", __asm__ volatile ("vcmpgtsh %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vcmpgtsw", __asm__ volatile ("vcmpgtsw %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); printf("\nFloat\n"); __asm__ volatile ("vspltisw %0, 1" : "=v"(vsi_a)); vf_a = (__vector float)vsi_a; __asm__ volatile ("vspltisw %0, 2" : "=v"(vsi_b)); vf_b = (__vector float)vsi_b; TEST("vaddfp", __asm__ volatile ("vaddfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vsubfp", __asm__ volatile ("vsubfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vmaxfp", __asm__ volatile ("vmaxfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vminfp", __asm__ volatile ("vminfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vmaddfp", __asm__ volatile ("vmaddfp %0,%1,%2,%0": "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vnmsubfp", __asm__ volatile ("vnmsubfp %0,%1,%2,%0": "=v"(vf_r): "v"(vf_a), "v"(vf_b))); TEST("vrefp", __asm__ volatile ("vrefp %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vrsqrtefp", __asm__ volatile ("vrsqrtefp %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vrfin", __asm__ volatile ("vrfin %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vrfiz", __asm__ volatile ("vrfiz %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vrfip", __asm__ volatile ("vrfip %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vrfim", __asm__ volatile ("vrfim %0,%1" : "=v"(vf_r) : "v"(vf_a))); TEST("vcmpgtfp", __asm__ volatile ("vcmpgtfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vcmpeqfp", __asm__ volatile ("vcmpeqfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vcmpgefp", __asm__ volatile ("vcmpgefp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vcmpbfp", __asm__ volatile ("vcmpbfp %0,%1,%2" : "=v"(vf_r) : "v"(vf_a), "v"(vf_b))); TEST("vcfux", __asm__ volatile ("vcfux %0,%1,0" : "=v"(vf_r) : "v"(vui_a))); TEST("vcfsx", __asm__ volatile ("vcfsx %0,%1,0" : "=v"(vf_r) : "v"(vsi_a))); TEST("vctuxs", __asm__ volatile ("vctuxs %0,%1,0" : "=v"(vui_r) : "v"(vf_a))); TEST("vctsxs", __asm__ volatile ("vctsxs %0,%1,0" : "=v"(vsi_r) : "v"(vf_a))); printf("\nPack/Unpack\n"); TEST("vpkuhum", __asm__ volatile ("vpkuhum %0,%1,%2" : "=v"(vuc_r) : "v"(vus_a), "v"(vus_b))); TEST("vpkuwum", __asm__ volatile ("vpkuwum %0,%1,%2" : "=v"(vus_r) : "v"(vui_a), "v"(vui_b))); TEST("vpkuhus", __asm__ volatile ("vpkuhus %0,%1,%2" : "=v"(vuc_r) : "v"(vus_a), "v"(vus_b))); TEST("vpkuwus", __asm__ volatile ("vpkuwus %0,%1,%2" : "=v"(vus_r) : "v"(vui_a), "v"(vui_b))); TEST("vpkshus", __asm__ volatile ("vpkshus %0,%1,%2" : "=v"(vuc_r) : "v"(vss_a), "v"(vss_b))); TEST("vpkswus", __asm__ volatile ("vpkswus %0,%1,%2" : "=v"(vus_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vpkshss", __asm__ volatile ("vpkshss %0,%1,%2" : "=v"(vsc_r) : "v"(vss_a), "v"(vss_b))); TEST("vpkswss", __asm__ volatile ("vpkswss %0,%1,%2" : "=v"(vss_r) : "v"(vsi_a), "v"(vsi_b))); TEST("vpkpx", __asm__ volatile ("vpkpx %0,%1,%2" : "=v"(vus_r) : "v"(vui_a), "v"(vui_b))); TEST("vupkhsb", __asm__ volatile ("vupkhsb %0,%1" : "=v"(vss_r) : "v"(vsc_a))); TEST("vupklsb", __asm__ volatile ("vupklsb %0,%1" : "=v"(vss_r) : "v"(vsc_a))); TEST("vupkhsh", __asm__ volatile ("vupkhsh %0,%1" : "=v"(vsi_r) : "v"(vss_a))); TEST("vupklsh", __asm__ volatile ("vupklsh %0,%1" : "=v"(vsi_r) : "v"(vss_a))); TEST("vupkhpx", __asm__ volatile ("vupkhpx %0,%1" : "=v"(vui_r) : "v"(vus_a))); TEST("vupklpx", __asm__ volatile ("vupklpx %0,%1" : "=v"(vui_r) : "v"(vus_a))); printf("\nAverage\n"); TEST("vavgub", __asm__ volatile ("vavgub %0,%1,%2" : "=v"(vuc_r) : "v"(vuc_a), "v"(vuc_b))); TEST("vavguh", __asm__ volatile ("vavguh %0,%1,%2" : "=v"(vus_r) : "v"(vus_a), "v"(vus_b))); TEST("vavguw", __asm__ volatile ("vavguw %0,%1,%2" : "=v"(vui_r) : "v"(vui_a), "v"(vui_b))); TEST("vavgsb", __asm__ volatile ("vavgsb %0,%1,%2" : "=v"(vsc_r) : "v"(vsc_a), "v"(vsc_b))); TEST("vavgsh", __asm__ volatile ("vavgsh %0,%1,%2" : "=v"(vss_r) : "v"(vss_a), "v"(vss_b))); TEST("vavgsw", __asm__ volatile ("vavgsw %0,%1,%2" : "=v"(vsi_r) : "v"(vsi_a), "v"(vsi_b))); printf("\nSplat/Immediate\n"); TEST("vspltisb", __asm__ volatile ("vspltisb %0, 1" : "=v"(vsc_r))); TEST("vspltish", __asm__ volatile ("vspltish %0, 1" : "=v"(vss_r))); TEST("vspltisw", __asm__ volatile ("vspltisw %0, 1" : "=v"(vsi_r))); TEST("vspltb", __asm__ volatile ("vspltb %0,%1,0" : "=v"(vuc_r) : "v"(vuc_a))); TEST("vsplth", __asm__ volatile ("vsplth %0,%1,0" : "=v"(vus_r) : "v"(vus_a))); TEST("vspltw", __asm__ volatile ("vspltw %0,%1,0" : "=v"(vui_r) : "v"(vui_a))); printf("\nCount Leading Zeros\n"); TEST("vclzb", __asm__ volatile ("vclzb %0,%1" : "=v"(vuc_r) : "v"(vuc_a))); TEST("vclzh", __asm__ volatile ("vclzh %0,%1" : "=v"(vus_r) : "v"(vus_a))); TEST("vclzw", __asm__ volatile ("vclzw %0,%1" : "=v"(vui_r) : "v"(vui_a))); printf("Results: %d passed, %d failed\n", pass, fail); return 0; } $ cat ../ps3_altivec_test.txt ps3@ps3linux ~> ./a.out Integer Add/Sub OK: vaddubm OK: vadduhm OK: vadduwm OK: vaddubs OK: vadduhs OK: vadduws OK: vaddsbs OK: vaddshs OK: vaddsws OK: vsububm OK: vsubuhm OK: vsubuwm OK: vsububs OK: vsubuhs OK: vsubuws OK: vsubsbs OK: vsubshs OK: vsubsws Integer Multiply OK: vmuleub OK: vmuloub OK: vmuleuh OK: vmulouh OK: vmulesb OK: vmulosb OK: vmulesh OK: vmulosh === Multiply Sum === OK: vmsumubm OK: vmsummbm OK: vmsumuhm OK: vmsumshm OK: vmsumuhs OK: vmsumshs Sum Across OK: vsum4ubs OK: vsum4sbs OK: vsum4shs OK: vsum2sws OK: vsumsws Min/Max OK: vmaxub OK: vmaxuh OK: vmaxuw OK: vmaxsb OK: vmaxsh OK: vmaxsw OK: vminub OK: vminuh OK: vminuw OK: vminsb OK: vminsh OK: vminsw Logical OK: vand OK: vandc OK: vor OK: vnor OK: vxor Shift/Rotate OK: vsl OK: vsr OK: vslo OK: vsro OK: vslb OK: vsrb OK: vsrab OK: vslh OK: vsrh OK: vsrah OK: vslw OK: vsrw OK: vsraw OK: vrlb OK: vrlh OK: vrlw Permute/Select OK: vperm OK: vsel OK: vsldoi OK: vmrghb OK: vmrglb OK: vmrghh OK: vmrglh OK: vmrghw OK: vmrglw Compare OK: vcmpequb OK: vcmpequh OK: vcmpequw OK: vcmpgtub OK: vcmpgtuh OK: vcmpgtuw OK: vcmpgtsb OK: vcmpgtsh OK: vcmpgtsw Float OK: vaddfp OK: vsubfp OK: vmaxfp OK: vminfp OK: vmaddfp OK: vnmsubfp OK: vrefp OK: vrsqrtefp OK: vrfin OK: vrfiz OK: vrfip OK: vrfim OK: vcmpgtfp OK: vcmpeqfp OK: vcmpgefp OK: vcmpbfp OK: vcfux OK: vcfsx OK: vctuxs OK: vctsxs Pack/Unpack OK: vpkuhum OK: vpkuwum OK: vpkuhus OK: vpkuwus OK: vpkshus OK: vpkswus OK: vpkshss OK: vpkswss OK: vpkpx OK: vupkhsb OK: vupklsb OK: vupkhsh OK: vupklsh OK: vupkhpx OK: vupklpx Average OK: vavgub OK: vavguh OK: vavguw OK: vavgsb OK: vavgsh OK: vavgsw Splat/Immediate OK: vspltisb OK: vspltish OK: vspltisw OK: vspltb OK: vsplth OK: vspltw Count Leading Zeros FAIL: vclzb (illegal instruction) FAIL: vclzh (illegal instruction) FAIL: vclzw (illegal instruction) Results: 135 passed, 3 failed ps3@ps3linux ~> cat /proc/cpuinfo processor : 0 cpu : Cell Broadband Engine, altivec supported clock : 3192.000000MHz revision : 33.0 (pvr 0070 2100) processor : 1 cpu : Cell Broadband Engine, altivec supported clock : 3192.000000MHz revision : 33.0 (pvr 0070 2100) timebase : 79800000 platform : PS3 model : SonyPS3 $ cat ../xenon_altivec_test.txt xenon ~ # ./a.out Integer Add/Sub OK: vaddubm OK: vadduhm OK: vadduwm OK: vaddubs OK: vadduhs OK: vadduws OK: vaddsbs OK: vaddshs OK: vaddsws OK: vsububm OK: vsubuhm OK: vsubuwm OK: vsububs OK: vsubuhs OK: vsubuws OK: vsubsbs OK: vsubshs OK: vsubsws Integer Multiply FAIL: vmuleub (illegal instruction) FAIL: vmuloub (illegal instruction) FAIL: vmuleuh (illegal instruction) FAIL: vmulouh (illegal instruction) FAIL: vmulesb (illegal instruction) FAIL: vmulosb (illegal instruction) FAIL: vmulesh (illegal instruction) FAIL: vmulosh (illegal instruction) === Multiply Sum === FAIL: vmsumubm (illegal instruction) FAIL: vmsummbm (illegal instruction) FAIL: vmsumuhm (illegal instruction) FAIL: vmsumshm (illegal instruction) FAIL: vmsumuhs (illegal instruction) FAIL: vmsumshs (illegal instruction) Sum Across FAIL: vsum4ubs (illegal instruction) FAIL: vsum4sbs (illegal instruction) FAIL: vsum4shs (illegal instruction) FAIL: vsum2sws (illegal instruction) FAIL: vsumsws (illegal instruction) Min/Max OK: vmaxub OK: vmaxuh OK: vmaxuw OK: vmaxsb OK: vmaxsh OK: vmaxsw OK: vminub OK: vminuh OK: vminuw OK: vminsb OK: vminsh OK: vminsw Logical OK: vand OK: vandc OK: vor OK: vnor OK: vxor Shift/Rotate OK: vsl OK: vsr OK: vslo OK: vsro OK: vslb OK: vsrb OK: vsrab OK: vslh OK: vsrh OK: vsrah OK: vslw OK: vsrw OK: vsraw OK: vrlb OK: vrlh OK: vrlw Permute/Select OK: vperm OK: vsel OK: vsldoi OK: vmrghb OK: vmrglb OK: vmrghh OK: vmrglh OK: vmrghw OK: vmrglw Compare OK: vcmpequb OK: vcmpequh OK: vcmpequw OK: vcmpgtub OK: vcmpgtuh OK: vcmpgtuw OK: vcmpgtsb OK: vcmpgtsh OK: vcmpgtsw Float OK: vaddfp OK: vsubfp OK: vmaxfp OK: vminfp OK: vmaddfp OK: vnmsubfp OK: vrefp OK: vrsqrtefp OK: vrfin OK: vrfiz OK: vrfip OK: vrfim OK: vcmpgtfp OK: vcmpeqfp OK: vcmpgefp OK: vcmpbfp OK: vcfux OK: vcfsx OK: vctuxs OK: vctsxs Pack/Unpack OK: vpkuhum OK: vpkuwum OK: vpkuhus OK: vpkuwus OK: vpkshus OK: vpkswus OK: vpkshss OK: vpkswss OK: vpkpx OK: vupkhsb OK: vupklsb OK: vupkhsh OK: vupklsh OK: vupkhpx OK: vupklpx Average OK: vavgub OK: vavguh OK: vavguw OK: vavgsb OK: vavgsh OK: vavgsw Splat/Immediate OK: vspltisb OK: vspltish OK: vspltisw OK: vspltb OK: vsplth OK: vspltw Count Leading Zeros FAIL: vclzb (illegal instruction) FAIL: vclzh (illegal instruction) FAIL: vclzw (illegal instruction) Results: 116 passed, 22 failed xenon ~ # cat /proc/cpuinfo processor : 0 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) processor : 1 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) processor : 2 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) processor : 3 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) processor : 4 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) processor : 5 cpu : Xenon, altivec supported clock : 3200.000000MHz revision : 8.0 (pvr 0071 0800) timebase : 50000000 platform : Xenon model : Xenon Game Console machine : Xenon Game Console